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System Validation Engineer

Intel


Location:
San Jose, CA
Date:
08/23/2017
2017-08-232017-09-21
Job Code:
JR0033162
Categories:
  • Engineering
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Job Details

System Validation Engineer Careers at Intel in San Jose, CA
   
Job ID: JR0033162
Job Category: Engineering
Primary Location: San Jose, CA US
Other Locations:
Job Type: Experienced Hire

System Validation Engineer

Job Description

We're part of the Programmable platform engineering within the PSG, and we're looking for motivated, passionate and talented engineers to join our Post Si System Validation team. We're a strong, vibrant team who define, create and develop the environment and test suites that we use to validate FPGA.You will be responsible for creating, defining and developing system validation environment, methodology and test suites for FPGA products in PSG. You will use this environment to carry out post silicon validation of embedded SoC IP on leading edge process technology nodes and devices. Your specific responsibilities will include developing post silicon validation test plans for SoC, executing test plans and generating appropriate test reports. You will also be responsible for script development to automate test case development and provides SoC and peripheral IP bring up and debugging support. As a senior member of the group you are expected to drive post silicon validation methodologies and correlation of pre-silicon models with actual silicon. In this position, you will also work with multiple customer and customer support teams understand the customer use cases to develop system level environment to validate the silicon. Candidate should have strong HW-SW debug skills, broad understanding of architecture, design and protocols. The ideal candidate should exhibit the following behavioral traits: - Problem-solving skills - Ability to multitask - Strong written and verbal communication skills - Ability to work in a dynamic and team oriented environment.


Qualifications

Minimum Qualifications:
1. Minimum B.S. in Electrical Engineering / Computer Engineering / Computer Science with minimum of 6 + years of working experience in silicon validation.
2. System validation and/or verification/AV and/or post silicon validation
3. Programming languages such as C and C++
Preferred Qualifications
1. Very comfortable with various operating systems: Windows and Linux
2. Scripting in BASH, Python, Ruby or similar runtime scripting languages
3 Familiar with protocols - DDR, Ethernet and PCIe
4. Good knowledge in high speed IO electrical characterization
5. Good understanding and experience of debugging with a logic analyzer or a software debugger, protocol analyzer, Ethernet tester and other lab equipment.

Inside this Business Group

The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.


Posting Statement. Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.
   

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