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SOC Design Engineer


San Jose, CA
Job Code:
  • Engineering
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Job Details

SOC Design Engineer Careers at Intel in San Jose, CA
Job ID: JR0052830
Job Category: Engineering
Primary Location: San Jose, CA US
Other Locations:
Job Type: College Grad

SOC Design Engineer

Job Description

•    Become a member of one of the largest electrical engineering companies in the world! As a Design Engineer for high speed digital design your responsibilities will be but are not limited to: Sub-system and Full Chip level to validate the design in an energetic design engineering team and management environment to develop next generation FPGA platforms for the data center and networking markets. Closely work with IP and subsystem and fullchip level teams in verifying the designs.

Be part of a team that strives for innovation and consistent methodologies to solve challenging problem, while pushing for a very high quality product to tape out. Create verification architecture and test-plan specifications. Responsible for design verification of a complex design while creating a culture of industry standard best practices and methodologies. Will be working with partners across multiple-sites and both during pre-si and post-si phase of the project. Creating and documenting verification plans.

Behavioral Traits
Verbal and written communication skills are needed.


You must possess the below minimum qualifications to be initially considered for this position. Experience listed below would be obtained through a combination of your school work/classes/research and/or relevant previous job and/or internship experiences. This is an entry level position and will be compensated accordingly. Minimum Requirements: -The candidate must have a Master's degree in Computer Science, Computer Engineering, Electrical Engineering or related field. - Minimum of 3 months experience in: IC Designs, CPU or ASIC or FPGA.System Verilog and VMM/OVM/UVM. Preferred Qualifications -Hardware Design, Verification and Validation Principles. -Verilog and System Verilog design of complex IP blocks working with high speed design. -Cache coherency or memory system verification. -Design verification. -UVM based methodologies. -Test bench architecture, test case development, functional coverage, coverage collection and analysis. -Microcontroller subsystem verification.Formal verification methods property checking is desirable.

Inside this Business Group

The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.

Posting Statement. Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.

As an electronics industry innovator and a leader in corporate responsibility, we look for ways to apply our technology to address global challenges while serving as a role model for how companies should operate.

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