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SoC Architect Functional Safety

Intel


Location:
Atin, TX
Date:
09/18/2017
2017-09-182017-10-17
Job Code:
JR0036518
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Job Details

SoC Architect Functional Safety Careers at Intel in Austin, TX
   
Job ID: JR0036518
Job Category: Engineering
Primary Location: Austin, TX US
Other Locations:
Job Type: Experienced Hire

SoC Architect Functional Safety

Job Description

The SoC architecture team of the Intel Programmable Solutions Group PSG defines the hardened processor subsystems HPS within FPGA SoC devices.

  • The HPS consists of multicore processors, multi-level memory hierarchies, standardized peripherals as well as a high-performance interface that allows the FPGA fabric and HPS to perform cooperative processing.
  • In addition to the HPS, these FPGA SoC devices have a Secure Device Manager SDM that performs FPGA configuration, processor boot, device root-of-trust and security, device power management, as well as provides a variety of device level services.


Qualifications

As an SoC Architect - Functional Safety, your responsibilities will include:

  • Understanding and documenting customer use cases.
  • Prototyping, modeling and benchmarking of the HPS and SDM for next generation platforms.
  • Authoring related architectural and functional specifications.
  • Supporting RTL, DV, and applications teams throughout development and product lifecycle including design plan review,
  • DV plan review, and validation plan review.

All the above will be done in the context of solutions for functional safety including ISO26262, ASIL, and SIL

The successful candidate's minimum qualifications will include the following:

  • MS or PhD in Computer Science, Computer Engineering, or Electrical Engineering or equivalent.
  • 6+ years industry silicon architecture or design experience Including:
    • Mandatory 2+ years experiences authoring silicon specifications for functional safety ISO26262, ASIL, SIL
    • Mandatory 3+ years' experience in most the below areas:
      • network-on-chip and related protocols AXI, OCP, etc.,
      • architectures for reset, clocking, and power management,
      • ARM processor configuration,
      • Standard interfaces such as USB and Ethernet
  • 2+ years of experience in specification of or design of SoCs or high complexity IP blocks.
  • Ability to read, simulate, and debug VHDL or Verilog.

    Inside this Business Group

    The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.


    Posting Statement. Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.
       

    As an electronics industry innovator and a leader in corporate responsibility, we look for ways to apply our technology to address global challenges while serving as a role model for how companies should operate.

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