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Senior Soft IP Logic Design Engineer

Intel


Location:
Kulim
Date:
04/06/2018
2018-04-062018-05-05
Job Code:
JR0056022
Categories:
  • Engineering
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Job Details

Senior Soft IP Logic Design Engineer Careers at Intel in Kulim, KDH
   
Job ID: JR0056022
Job Category: Engineering
Primary Location: Kulim, KDH MY
Other Locations:
Job Type: Experienced Hire

Senior Soft IP Logic Design Engineer

Job Description

Looking for passionate, motivated and driven candidate who likes to deal with different challenges and make a difference. Position requires experience in digital logic design and exposure to pre/post-silicon validation.

Candidate will be responsible for logic design in PCH-specific IPs PSI team under PEG-ITG-CIG-PID group, responsibilities including but not limited to:

- Performs logic design, Register Transfer Level RTL coding, and simulation to generate cell libraries, functional units, and subsystems for inclusion in full chip designs

- Applies various strategy/tools/methods to qualify the design for lint, synthesizability, DFx, clock/reset domain crossing, power/performance implications, etc

- Participates in the development of Architecture and Microarchitecture specifications for the Logic components

- Provides IP integration support to SoC customers and represents RTL team.

Excellent communication and organization skills are critical, along with teamwork, and must demonstrate strong technical leadership skills, passion for design/tools and methodology and strong influencing skills.

Candidate must have strong orientation for Quality, 'Commit & Deliver' mindset, drive Innovation/efficiencies and have strong strategic thinking to come up with paradigm shift solutions to critical design/validation challenges.


Qualifications

You must possess a minimum of Bachelor Degree in Computer Engineering or Electrical Engineering Master Degree in Computer Engineering or Electrical Engineering preferred.

Minimum Requirements:

- 7+ years of experience in relevant logic design position and must have gone through multiple project cycles to gather in-depth experience.

- 7+ years of experience in digital logic design with various tools and methodologies including: System Verilog, Perl, VCS/Synopsys simulators, Lint, synthesis, Clock Domain Crossing tools, DFX Scan and Power.

- 7+ years of experience in PC Architecture.

- Experienced in VLSI or Structural and Physical design flow/methodology.

- Experience in SPI, USB, PCI express or any Industrial standard bus protocol would be added value.

- Strong analyzing and debugging skill, and creative in problem solving.

Inside this Business Group

The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.

   

As an electronics industry innovator and a leader in corporate responsibility, we look for ways to apply our technology to address global challenges while serving as a role model for how companies should operate.

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