Sign In
 [New User? Sign Up]
Mobile Version

Senior Physical Design Engineer

Intel


Location:
Bangalore
Date:
04/06/2018
2018-04-062018-05-05
Job Code:
JR0056668
Categories:
  • Engineering
  •  
  • Save Ad
  • Email Friend
  • Print

Job Details

Senior Physical Design Engineer Careers at Intel in Bangalore, KA
   
Job ID: JR0056668
Job Category: Engineering
Primary Location: Bangalore, KA IN
Other Locations:
Job Type: Experienced Hire

Senior Physical Design Engineer

Job Description
The Scalable Performance CPU Development Group SDG is searching for an energetic and passionate senior physical design engineer who is ready to be part of Server Technology Pathfinding STP team. We are looking for someone who has passion to work on big problems that affect design & technology in our future server products. This role provides opportunities to work with senior technical people from Principal Engineer to Fellows on a regular basis. Direct Responsibilities: Work on synthesis, physical design of different IP partitions and SoC. Deep understanding of critical technical issues affecting PPA power, performance, area by working with technology and design teams. Analyzes sensitivities of physical design to technology, design, library & tool parameters. Contributes to the development of multidimensional optimizations that would directly impact IP & SoC design. Performs all aspects of SoC physical design flow from high-level design to synthesis, place and route, DFx, timing and power to create a design database that is ready for manufacturing.


Qualifications

The ideal candidate should be able to demonstrate the following behaviors: Ability to work effectively across multiple teams like technology, packaging. Experience in working on silicon physical designs which include processor cores and custom logic. Strong problem solving, written and verbal communication skills. Capable of working in a high performing team to deliver the results required from the organization. Ability to independently work with Native CAD tools or develop small automation scripts for high productivity. Facilitator of direct and open communication, diversity of opinion, and debate.QualificationsMS+4, PHD+0 In Electrical Engineering or Computer EngineeringRequired Skills : 1-2 years experience working with Synthesis Place and Route Flows. Experience in taking a design from concept to Tape-in is a PLUS.Tools/software: Experience working with Synthesis, Place, route and timing tools example: DC, ICC, StarRC, PT TCL scripting, Shell, Unix

Inside this Business Group

The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.


Legal Disclaimer:

Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.

It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel’s offices for various positions and further requiring them to deposit money to be eligible for the interviews.   We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at and not fall prey to unscrupulous elements.


   

As an electronics industry innovator and a leader in corporate responsibility, we look for ways to apply our technology to address global challenges while serving as a role model for how companies should operate.

Powered ByLogo

Featured Employers

Featured Jobs