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Senior FPGA Applications Engineering High Speed and IP

Intel


Location:
San Jose, CA
Date:
08/21/2017
2017-08-212017-09-19
Job Code:
JR0033283
Categories:
  • Engineering
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Job Details

Senior FPGA Applications Engineering High Speed and IP Careers at Intel in San Jose, CA
   
Job ID: JR0033283
Job Category: Engineering
Primary Location: San Jose, CA US
Other Locations: US, Massachusetts, Chelmsford;
Job Type:

Senior FPGA Applications Engineering High Speed and IP

Job Description

Intel Programmable Solution Group (formerly Altera) is looking for motivated talents to work with defense customers on their FPGA projects. In this Senior Applications Engineer role, you will be responsible for supporting customers and enabling the successful completion of customer projects by providing technical expertise, guidance, design optimizations and issue resolution.

Applications Engineers are engaged during all phases of the product development cycle including feature definition, project setup, project execution, and primarily technical support. Providing technical training, consultation, and hands-on assistance to developers in specialty areas of the FPGA product cycle. They provide training, consultation, and hands-on assistance to customers using Intel Quartus SW Tools. In addition, they create example designs and work with Intel engineering resources to validate and debug current IP products.

Please be informed that Intel is proactively trying to find candidates for a position and that may, or may not, be available for all location(s) at this time. If you're interested in this position, we encourage you to apply, and our hiring team will be glad to contact you if/when relevant.



Qualifications
- BS in Electrical Engineering - 10 years of relevant experience - Protocol knowledge and experience in one or more of the following area's PCI Express, Ethernet, Interlaken, DDR, and/or JESD - Experience with Verilog and/or VHDL coding and debug - Experience in FPGA design flows - Willing to travel Preferred (Additional) Qualifications - Experience with RTL code optimization - Experience with FPGA timing closure - Experience with high speed test equipment such as scopes, BERTs, spectrum analyzers, and protocol analyzers - Experience with Video IP protocols



Other Locations
US, Massachusetts, Chelmsford;


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