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Senior DFT Engineer


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Job Details

Senior DFT Engineer Careers at Intel in Bangalore, KA
Job ID: JR0048727
Job Category: Engineering
Primary Location: Bangalore, KA IN
Other Locations: Malaysia, Penang;
Job Type: Experienced Hire

Senior DFT Engineer

Job Description
Develops preSilicon functional validation tests to verify system will meet design requirements. Creates test plans for RTL validation, defining and running system simulation models, and finding and implementing corrective measures for failing RTL tests. Analyzes and uses results to modify testing.


Qualification : Master of Science or a Master of Technology degree in Electrical Engineering with more than 10 years of relevant industry experience or a Bachelor of Science Bachelor of Technology degree in Electrical Engineering with more than 12 years of relevant industry experience Experience : Relevant ASIC design/validation experience in front end processes including RTL functional, performance and power verification. Expertise in verification of design blocks IP for system-on-chip SoC components Expertise in system verilog, and/ OVM or UVM based verification methodologies. Experience in OOP concepts, coverage based random validation Experience in one/more of the following areas PCIe, USB, DP, DFT Protocols. Knowledge of scripting, SVA , UPF validation. Knowledge of IO interconnect , memory controllers, CPU architecture is a plus. Knowledge of considerations for performance, power and cost optimization is desirable.Expected to be thorough with general verification concepts with System Verilog/OVM/UVM- Writing test cases and making scoreboard/infrastructure changes to the environment.Ownership/coding/enhancement of functional scoreboards/agents/sequences/monitors- Responsible for understanding architecture spec and deriving test cases / testplans.Need to be a key team player, while being highly energetic and motivated, independent and self-driven with minimal mentoring/hand-holding- Expected to help/drive in throughput test case setup/analysis/report of the DUT- Expected to define functional coverage/code/hit it through sequence enhancement and newer/directed test cases.

Inside this Business Group

The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.

Other Locations

Malaysia, Penang;

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As an electronics industry innovator and a leader in corporate responsibility, we look for ways to apply our technology to address global challenges while serving as a role model for how companies should operate.

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