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PSG - Design Engineer - External Memory Interface

Intel


Location:
Toronto
Date:
04/06/2018
2018-04-062018-05-05
Job Code:
JR0050694
Categories:
  • Engineering
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Job Details

PSG Careers at Intel in Design Engineer
   
Job ID: JR0050694
Job Category: Engineering
Primary Location: Toronto, ON CA
Other Locations:
Job Type: Experienced Hire

PSG - Design Engineer - External Memory Interface

Job Description

Intel's Programmable Solutions Group PSG IP Engineering team PIPE develops comprehensive solutions to provide customers easy and efficient access to the capabilities of Intel's FPGA devices. These solutions are provided as highly-configurable intellectual property IP cores that are fully integrated with Intel PSG's software CAD tool, Quartus II.External Memory Interface IP EMIF is one category of important IP Cores. While FPGAs do have on-chip embedded memory, it is of limited capacity. Many end market applications require storage or buffering of large amounts Gigabytes of memory, and thus an external memory interface becomes a critical component of most electronic systems. Intel PSG's External Memory Interface IP cores provide configurable access to these high-speed, high-bandwidth external memory devices. The constantly rising speed and complexity of memory devices presents a challenging design problem that requires innovation in hardware design, a strong knowledge of system timing, and an understanding of customer flows and applications.

As an External Memory Interface IP Design Engineer, you will work with a team of engineers to develop and verify state-of-the-art External Memory Interface IP cores, such as DDR4 interfaces.

You will be working on advanced device architectures, design definition, implementation and verification.

You will also be developing design examples and simulation models, accompanied by a rich set of technical documentation.

Your specific responsibilities will include, but are not limited to the following:- Architecture and Design based on latest memory protocol specifications- RTL development- Device support and CAD tool integration- Verification e.g. verification IP, methodologies, framework, bus functional models, regression tests- New product release or rollout support- Customer technical support


Qualifications

You must possess the minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Relevant experience can be obtained through school work, classes and project work, internships, military training, and/ or work experience.Minimum Requirements:- -The candidate must have a Bachelor's, Master's, of PhD degree in Computer Engineering, Electrical Engineering, or any related field. -Minimum 5 years of experience in the following: - RTL design with Verilog and/or VHDL.- RTL verification and timing analysis/closure.- Software engineering and scripting languages.

Inside this Business Group

The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.

   

As an electronics industry innovator and a leader in corporate responsibility, we look for ways to apply our technology to address global challenges while serving as a role model for how companies should operate.

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