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Principal Place and Route Engineer


San Jose, CA
Job Code:
  • Engineering
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Job Details

Principal Place and Route Engineer Careers at Intel in San Jose, CA
Job ID: JR0044898
Job Category: Engineering
Primary Location: San Jose, CA US
Other Locations:
Job Type: Experienced Hire

Principal Place and Route Engineer

Job Description
As part of Intel, we continue to apply Moore's Law to drive the future of field-programmable gate array FPGA technology. The Programmable Solutions Group PSG at Intel has been delivering industry-leading custom logic solutions to customers since inventing the world's first reprogrammable logic device in 1984. In order to take advantage of the many opportunities that we see in the future for FPGA's, PSG is looking for Principal Engineer who will help us drive the Implementation Tools team to create next generation algorithms for Place, Route and Physical Synthesis. Principal Engineers at Intel are active technical leaders inside and outside the company. Activities include participation in major industry and academic conferences, voting membership in international standards committees, generation of patents and technical papers.


Responsibilities:As an Principal Software Engineer in Quartus Implementation Tools team, you will be working to architect next generation FPGA Implementation algorithms. You will also be technically guiding various teams to productize the solution. Responsibilities for this position include developing innovative techniques that can improve metrics like timing Quality of Results QoR, wirelength and congestion of the designs. Responsibilities also include coming up with projects to help improve tool runtime and/or memory footprint. Successful execution of these responsibilities would require deep understanding of numerical optimization, static timing analysis, interconnect modelling and other physical design concepts. Qualifications: MS PhD preferred in Computer Science, Computer Engineering, or related field with over 15 years of work experience with Place and Route development in ASIC/FPGA CAD tool. Good handle over C/C++ , data structures, algorithms and numerical optimization techniques is expected.

Inside this Business Group

The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.

Posting Statement. Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.

Position of Trust. This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Talent Consultant.


As an electronics industry innovator and a leader in corporate responsibility, we look for ways to apply our technology to address global challenges while serving as a role model for how companies should operate.

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