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Platform IP Design Engineer

Intel


Location:
San Jose, CA
Date:
08/21/2017
2017-08-212017-09-19
Job Code:
JR0033812
Categories:
  • Engineering
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Job Details

Platform IP Design Engineer Careers at Intel in San Jose, CA
   
Job ID: JR0033812
Job Category: Engineering
Primary Location: San Jose, CA US
Other Locations:
Job Type: Experienced Hire

Platform IP Design Engineer

Job Description
Oversees definition, design, verification, and documentation for SoC System on a Chip development. Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation. Performs Logic design for integration of cell libraries, functional units and subsystems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs. Contributes to the development of multidimensional designs involving the layout of complex integrated circuits. Performs all aspects of the SoC design flow from highlevel design to synthesis, place and route, timing and power to create a design database that is ready for manufacturing. Analyzes equipment to establish operation infrastructure, conducts experimental tests, and evaluates results. May also review vendor capability to support development.


Qualifications

Minimum qualifications:- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering or a related field. - 6 + years Verilog and/or SystemVerilog experience.- 2 + years FPGA development experience using Intel/Altera Quartus II software or Xilinx Vivado.Preferred Qualifications:- Experience with interface and memory protocols such as PCIe, 10G/40G/100G Ethernet, and DDR4.- Experience with scripting languages such as TCL, Perl, or Python.- Experience with device drivers.Qualifications:In this position, you will be a member of the platform IP development team in Intel's Programmable Solutions Group PSG. You will be responsible for developing the FPGA platform IP using Intel's latest FPGA technologies. In this role all aspects of FPGA development including: developing platform FPGA features in RTL using Verilog / SystemVerilog, RTL simulation, logic optimization, synthesis, FPGA floorplanning, timing closure. The ideal candidate will be able to demonstrate will be able to demonstrate accountability, self-motivation, strong communication skills, and strong technical potential.

Inside this Business Group

The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.


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