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Package Design Engineer

Intel


Location:
Phoenix, AZ
Date:
08/23/2017
2017-08-232017-09-21
Job Code:
JR0007069
Categories:
  • Engineering
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Job Details

Package Design Engineer Careers at Intel in Phoenix, AZ
   
Job ID: JR0007069
Job Category: Engineering
Primary Location: Phoenix, AZ US
Other Locations: US, Oregon, Hillsboro;
Job Type:

Package Design Engineer

Job Description
  • We're looking for an experienced IC Package Design Engineer DE to join as a member the Datacenter Package Engineering team which resides under the DCG Platform Hardware Engineering Division PHED. As a Package design engineer you will be responsible for early form factor component fit studies, die escape strategies, power delivery development and implementation, ball map creation, signal assignment, die interface co-design, and point to point routing of high speed interfaces. Your work will include designing & validating your package design using a variety of custom Intel tools. You will need to comprehend and drive schedules and design rules in a team environment. Product requirements are delivered and owned by a Responsible Engineer RE who will be your partner in defining, executing, and validating the package design. 90% of our designs require a team approach utilizing as many as 5 designers. Communication is critical to success. In addition, you will be expected to present key learnings in the group setting either face to face or via teleconference, develop Best Know Method BKM documentation and collaborate at the team level. Experienced package designers are preferred, not required. Mentor Graphics Xpedition experience is also preferred, but not required given a solid history of quick ramp on various design software - ie, Solid Works, AutoCAD, Cadence Advanced Package Designer APD, etc..

  • Qualifications
  • Minimum of a Bachelor of Science degree in an Electrical, Computer, Mechanical , Engineering field or physics.

  •  2+years of prior experience/exposure with physical design Package preferred, PCB considered.

  • Demonstrate experience with Mentor Graphics Expedition Software OR other Package related SW suites.

  • Experience with high-speed layout techniques that involved parallel and serial differential interfaces

  • Experience in Package/Substrate technology development

  • Ability to use Windows based office Suite MS Excel, MS Powerpoint, MS Word etc

  • Exposure to process driven execution track record would be preferred.

  • Strong communication and team player mentality.-- Visual Basic, excel scripting, other language familiarity preferred.



Qualifications



Other Locations
US, Oregon, Hillsboro;


Posting Statement. Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.

   

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