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Modem RTL design Engineer

Intel


Location:
Santa Clara, CA
Date:
10/20/2017
2017-10-202017-11-18
Job Code:
JR0037588
Categories:
  • Engineering
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Job Details

Modem RTL design Engineer Careers at Intel in Santa Clara, CA
   
Job ID: JR0037588
Job Category: Engineering
Primary Location: Santa Clara, CA US
Other Locations:
Job Type: Experienced Hire

Modem RTL design Engineer

Job Description

Join the NGS group as a RTL Design Engineer, and be responsible for 5G modem micro-architecture and design, including FPGA based prototyping. You will be involved in the development cycle, which includes participating in high-level product specifications, working closely with Algorithm and verification engineers, FPGA prototyping, and debugging of 5G modem design.

Your specific responsibilities may include but are not limited to the following:

  • Work with cross-functional teams and prepare/support IP functional validation tests for IP bring-up on actual FPGA development kits
  • Develop micro-architecture, and SystemVerilog RTL to meet size, timing specificationso
  • Analyze, and identify bottlenecks in design and provide feedback on micro-architecture, pipelining, FPGA usage
  • Developing design, verification and validation tools and flows, as needed.
  • Apply advanced techniques to achieve verification and validation with the highest quality, productivity, and time-to-market


Qualifications

BSEE or MSEE, with experience in ASIC development and/or FPGA prototyping

  • 5+ years of experience in RTL design using Verilog, SystemVerilog
  • Experience with VCS, Verdi, Spyglass or equivalent tools
  • Experience in partitioning, synthesis, placement, timing closure for FPGA and/or ASICs
  • Enjoy debugging, and problem solving in a team environment

Preferred Qualifications:

  • Experience in Cellular WiMax, LTE, and/or other Physical layer WiFi, Ethernet technologies and embedded SW & HW design is a strong pluso
  • Experience with lab debug, multi-team, multi-site working environment is a strong pluso
  • Experience in RTL design with System Verilog/Verilog is a plus
  • Experience with Python, Perl, Tcl, C/C++ and shell scripts is a plus
  • Experience with ASIC synthesis flows, similar to Synopsys tool flow is a plus

Inside this Business Group

Communication & Devices Group: The wireless revolution at Intel! We are one team - passionate engineers and technologists from diverse industry backgrounds working together to realize a world of connected computing. We are bringing the best ideas from the brightest minds to deliver future mobile experiences into the market. We are on the journey towards making Intel a wireless leader with exciting products for the Internet of Things, 5G and an opportunity to change the world with your work.


Posting Statement. Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.
   

As an electronics industry innovator and a leader in corporate responsibility, we look for ways to apply our technology to address global challenges while serving as a role model for how companies should operate.

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