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Logical Validation Intern

Intel


Location:
Guadalajara
Date:
08/18/2017
2017-08-182017-09-16
Job Code:
JR0032960
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Job Details

Logical Validation Intern Careers at Intel in Guadalajara, JAL
   
Job ID: JR0032960
Job Category: Intern/Student
Primary Location: Guadalajara, JAL MX
Other Locations:
Job Type: Intern

Logical Validation Intern

Job Description

To execute functional validation tests in a validation cluster. To use analysis to help to debug silicon logical issues in State of the Art Server products. Execute test to validate Silicon designs and to code scripts for test automation and silicon debug purposes. Support on some methodology documentation activities.


Qualifications

We are looking for a candidate whose behavioral traits indicate:
- Ability to generate and deliver written and verbal reports on technical engineering content.
- Fluent written and verbal communication in English
- Good interpersonal and communication skills.

Minimum Qualifications
- Must be studying a University/Graduate program on Electrical Engineering, Electronic Engineering and Computing Engineering.
- Needs to have good programming skills (C or Python).
- Needs to have good digital electronic knowledge.

Inside this Business Group

The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.

   

As an electronics industry innovator and a leader in corporate responsibility, we look for ways to apply our technology to address global challenges while serving as a role model for how companies should operate.

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