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Logic Verification Engineer

Intel


Location:
Bangalore
Date:
08/18/2017
2017-08-182017-09-16
Job Code:
JR0013225
Categories:
  • Engineering
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Job Details

Logic Verification Engineer Careers at Intel in Bangalore, KA
   
Job ID: JR0013225
Job Category: Engineering
Primary Location: Bangalore, KA IN
Other Locations:
Job Type: Experienced Hire

Logic Verification Engineer

Job Description

Mixed Signal IP Solutions Group develops high speed serial and parallel IO for Intel products.

Mixed Signal IP Solutions Group is seeking experienced professional for logic Verification Position. The job duties include setting up the OVM environment, interpreting the architectural specifications, writing the verification code, and debug and regression. The person will also be responsible for verification coverge, removing coverga hole, and test failure debug. He/She will also be required to define the Post-SI tests and development of verification collaterals.


Qualifications

The candidate should have BS or MS in Electrical Engineering and 5+ years experience in logic RTL coding, understanding the architecture, and verification coding. Preference will be given to the candidate who has protocol knowledge of various industry standard IO protocols, and BFM coding

Inside this Business Group

The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.

   

As an electronics industry innovator and a leader in corporate responsibility, we look for ways to apply our technology to address global challenges while serving as a role model for how companies should operate.

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