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  • Intel
  • Santa Clara, CA United States
  • 04/06/2018
  • Engineering
In this position, you will responsible for the design and development of complex printed circuit boards and/or subsystems for Intel Silicon Photonics products and sub-component verification. Your responsibilities will include but not be limited to: Performing layout and routing studies that lead to ...  More Details
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  • Intel
  • Bangalore KA IN
  • 04/06/2018
  • Engineering
Senior Analog layout designers are responsible for designing layouts of complex analog IPs like SerDes, PCIe, LPDDR, PLLs, MIPI, Display Ports etcResponsible for resource estimation and coordination between resources for the full IP level layout, prioritization, Planning & Scheduling, Tracking, ...  More Details
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  • Intel
  • Bangalore KA IN
  • 04/06/2018
  • Engineering
You will be part of Intel Architecture Cores Group IACG Group within Platform Engineering Group, in the Big Core IP development team driving Intel's latest CPU's in the World's leading process technologies.Responsibilities will include but not limited to: Layout design of Datapath and Register Files...  More Details
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  • Intel
  • Bangalore KA IN
  • 04/06/2018
  • Engineering
Independently Creates Block Level Layout ensuring quality & schedule of deliverablesHas Skills to do floorplan, power grid templates, device placements for matching etcUnderstand Design Specifications to to good routing to reduce parasitics, match routes, meet signal RV specs etc..Be proficient ...  More Details
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  • Intel
  • Bangalore KA IN
  • 04/06/2018
This is a layout technical leadership position. Candidate has to be strong in physical verification concepts and must have worked on layout verification activities on at least couple of major projects. Prior experience working on Intel process design rules will be a big advantage. You will be provid...  More Details
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