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IP Logic Design-Integration lead

Intel


Location:
Bangalore
Date:
04/06/2018
2018-04-062018-05-05
Job Code:
JR0054469
Categories:
  • Engineering
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Job Details

IP Logic DesignCareers at Intel inIntegration lead
   
Job ID: JR0054469
Job Category: Engineering
Primary Location: Bangalore, KA IN
Other Locations:
Job Type: Experienced Hire

IP Logic Design-Integration lead

Job Description

The Scalable Performance CPU Development Group SDG is looking for energetic and passionate senior Logic Design/Integration Technical Lead for high speed serial link digital IP/subSystem.As a technical lead, you should be able to independently develop & drive various logic design and integration activities including micro-architecture, Developing RTL code from high level specs, ensuring end to end design quality in terms of Lint/CDC/DFT/Synthesis/STA/Formal Equivalence etc. Hands on Experience on various front-end EDA tools is must. Should be able to provide technical leadership and direction to junior design engineers in the group and able to come up with technical proposals helping implementation. Assist Pre-Silicon Verification team in developing Test plan and test coverage. Review the coverage reports from regression tests and provide feedback to verification team. Provide debug support in triaging test failures. Collaborate with system validation and Firmware/software teams for platform level debug .Work with structural design team to close floorplan and static timing on the block.Performs logic design, Register Transfer Level RTL coding, and simulation to generate cell libraries, functional units, and subsystems for inclusion in full chip designs. Participates in the development of Architecture and Microarchitecture specifications for the Logic components. Provides IP integration support to SoC customers and represents RTL team.Be able to interact with various stake holders internal as well as external to drive end 2 end quality, design objectives within stipulated schedule timelines.Excellent communication and interpersonal skills is must.


Qualifications

Qualifications:Bachelor of Engineering with minimum 15+ years of experience/Master of Engineering with 12+ years of relevant experience in Digital design and VLSI domain with degree in Electronics/Electrical or Comupter Science.

Inside this Business Group

The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.


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