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DFT Engineer


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Job Details

DFT Engineer Careers at Intel in Bangalore, KA
Job ID: JR0047696
Job Category: Engineering
Primary Location: Bangalore, KA IN
Other Locations:
Job Type: Experienced Hire

DFT Engineer

Job Description

Performs logic design, Register Transfer Level RTL coding, and simulation to generate cell libraries, functional units, and subsystems for inclusion in full chip designs. Participates in the development of Architecture and Microarchitecture specifications for the Logic components. Provides IP integration support to SoC customers and represents RTL team.Component Design Engineers are responsible for the design and development of electronic components. Responsibilities may include: This job description involves logic codeing of DFT/ATPG/Scan, debug and enhancement of scan coverage, and disposing the uncovered nodes. This job also involves working with stakeholders, such as RTL validation, backend people as well as Post-Si test engineers on scan test implemention


Candidate should possess a Bachelors or Masters degree in Computer/ Electrical/Electronics Engineering with 9+ yr experience. Strong knowledge of DFT architecture, design, methodologies and tools - Scan, MBIST, Analog DFT, JTAG, etc. Hands on experience with minimum of 9+ years DFT experience with strong/proven debug skills. Should be able to manage/mentor/groom 2/3 junior people in the team. A very good team player with good interpersonal, planning and communication skills

Inside this Business Group

The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.

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As an electronics industry innovator and a leader in corporate responsibility, we look for ways to apply our technology to address global challenges while serving as a role model for how companies should operate.

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