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High Speed Serial IO Validation Engineer

Intel


Location:
Atin, TX
Date:
01/15/2018
2018-01-152018-02-13
Job Code:
JR0047153
Categories:
  • Engineering
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Job Details

High Speed Serial IO Validation Engineer Careers at Intel in Austin, TX
   
Job ID: JR0047153
Job Category: Engineering
Primary Location: Austin, TX US
Other Locations:
Job Type: Experienced Hire

High Speed Serial IO Validation Engineer

Job Description

In this position, you will be part of the Intel MVE high speed I/O validation team, responsible for the electrical validation of high speed interfaces to ensure compliance with industrial requirements, healthy system margins, and support an efficient manufacturing flow. This position requires close work with Circuit Design, Manufacturing, Applications engineers, and Simulation and Validation teams. 

Responsibilities will include but not be limited to:

  • Validation of system margins to assess product quality and make Product release recommendation 
  • Develop scripts, software to validate the circuit parameters 
  • Validate characteristics of high speed interfaces such as PCIE, USB, HDMI Integrated circuit debug and validation to guarantee I/O margin to spec 
  • Analysis of I/O specification versus performance to ensure optimal match of design requirements 
  • Participation in new process development and validation methodologies, and improvement of existing methods.
  • Correlating data between High Volume Manufacturing (HVM), and Design or Electrical Validation  
  • Working as a peer leader in a team-oriented environment, interacting with engineers from cross functional teams and sites 
  • Strong spoken and written communication skills Strong problem solving and prioritization ability
     


Qualifications

  • Bachelor’s or Master’s Electrical Engineering degree
  • 10+ years of Integrated Circuit industry experience
  • Experience in Object Oriented Software coding and debugging skills with Python, Matlab, C++

Preferred Qualification

  • Fundamental knowledge of signal integrity and transmission line theory
  • Hands-on lab/debug experience with measurement and debug tools such as DMMs, oscilloscopes and BERT
  • Experience with statistical analysis and risk assessment for quality assessments
  • Good knowledge of validation methodologies and development.
  • Platform Architecture Knowledge of I/O, Power delivery Knowledge of I/O protocols, specs and compliance testing, PCI Express, SATA, USB3, and DDR etc. is highly desired
  • Experience with analog I/O & platform debug
  • Experience in HVM test development or debug and FAB processes is a plus

Inside this Business Group

The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.


Posting Statement. Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.
   

As an electronics industry innovator and a leader in corporate responsibility, we look for ways to apply our technology to address global challenges while serving as a role model for how companies should operate.

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