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Experience Logic Design Engineer for Intel Artificial Intelligence Products Group

Intel


Location:
Multiple Cities, IL
Date:
01/17/2018
2018-01-172018-02-15
Job Code:
JR0042141
Categories:
  • Engineering
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Job Details

Experience Logic Design Engineer for Intel Artificial Intelligence Products Group Careers at Intel in Multiple Cities,
   
Job ID: JR0042141
Job Category: Engineering
Primary Location: Multiple Cities, IL
Other Locations:
Job Type: Experienced Hire

Experience Logic Design Engineer for Intel Artificial Intelligence Products Group

Job Description

About us:

The Artificial Intelligence Products Group (AIPG) is developing breakthrough technologies that will lead the next evolution of compute by offering end-to-end AI solutions that broadly spans from the data center to the edge. Our team is focusing  on deep-Learning technology (a leading Artificial intelligence technology) and is responsible for the Hardware architecture, front-end design and firmware of an IP dedicated to those tasks. We love to work closely together and are looking for experienced micro-architects and design Engineers that can assume a vertical role from definition to implementation.

#HWatintel

About you :

In this position you will be responsible to micro-architect and code complex and numerous blocks as part of an IP that accelerates Artificial intelligence tasks.

As part of the position you would be working with Software and Algorithm teams in order to co-define the requirements, APIs  and interfaces, with peer micro-architects and designers ,as well as working closely with verification and modeling teams. The role is vertical and includes definitions (architecture) , micro-architecture and design implementation. We aim to achieve best Hardware quality – in timing area and power as well as being innovative in features. To achieve this we are using state of art design technologies and tools.

#AicommunityISR
#AIHWISR

#AIPG


Qualifications

Qualifications & Requirements :

  • Minimum 5 years of experience in RTL Design 
  • Experience in micro-architecture definitions
  • Experience with ASIC and/or IP design flows and methodologies

Advantage  :

  • C++ knowledge 
  • SystemC and previous experience with Cadence CtoS or other HLS tools 
  • Experience in synthesis and development of timing constraints

Inside this Business Group

Intel Nervana, leveraging Intel’s world leading position in silicon innovation and proven history in creating the compute standards that power our world, is transforming Artificial Intelligence (AI). Harnessing silicon designed specifically for AI, end-to-end solutions that broadly span from the data center to the edge, and tools that enable customers to quickly deploy and scale up, Intel Nervana is inside AI and leading the next evolution of compute.

   

As an electronics industry innovator and a leader in corporate responsibility, we look for ways to apply our technology to address global challenges while serving as a role model for how companies should operate.

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