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Digital Physical IC Design

Intel


Location:
Bangalore
Date:
09/18/2017
2017-09-182017-10-17
Job Code:
JR0033899
Categories:
  • Engineering
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Job Details

Digital Physical IC Design Careers at Intel in Bangalore, KA
   
Job ID: JR0033899
Job Category: Engineering
Primary Location: Bangalore, KA IN
Other Locations:
Job Type: Experienced Hire

Digital Physical IC Design

Job Description

Job Description: In this role, the Digital Physical IC Design Engineer will be part of team contributing to Silicon Photonics Solution Group's mission to transform and lead datacenter connectivity and enable Intel's differentiation in the networking space. As a Digital Physical IC Design Engineer, the individual will be involved in challenging projects and drive it to completion in record time. You will quickly ramp on the existing flow, understand the challenges, and produce the work plan. Your expertise in deep submicron technology design, and teamwork skills will be highly leveraged to guide activity across the entire cross-discipline, multi-site team. You will work with others to identify the issues, get buy-in on proposed solutions, and implement the solutions in time for the team to execute to schedule.


Qualifications

Minimum Qualifications:BSEE/MSEE with minimum of 6+ years in VLSI Design with expertise in RTL-to-GDSII flow, floor planning, Clock tree synthesis and block-level/chip-level signoff Motivation to drive an exciting projectNeeds to be familiar with all aspects of ASIC integration including floorplanning, clock and power distribution, global signal planning, I/O planning and hard IP integrationExperience solving SoC issues such as ESD strategies, mixed signal block integration, and package interactionsFamiliar with hierarchical design approach, top-down design, area budgeting and physical verification convergenceMust have experience on integrating IP from both internal and external vendors and be able to specify and drive IP requirements in the physical domainExperience with large SoC designs 10M gates with frequencies in excess of 1GHz utilizing 16nm and more advanced technologiesA detailed understanding of database management issues will be requiredExpertise using leading-edge EDA tools Synopsys, Cadence or Mentor Graphics From a CAD tool perspective, experience with floorplanning tools, P&R flows and physical design verification flows is requiredFamiliar with various process related design issues including Design for Yield and Manufacturability, multi-Vt strategies and thermal managementTCL and Bash mastery are a necessity Make, Perl and Python expertise is nice to havePreferred Qualifications:Experience in custom / data-path implementation is highly desirableAbility to provide mentorship and guidance to junior engineers and be a very effective team player Excellent verbal and written communication skillsExperience in integrating IP from both internal and external vendors and be able to specify and drive IP requirements in the physical domain Ability to plan, execute, course correct and optimize blocks and SoC level implementations

Inside this Business Group

The Data Center Group (DCG) is at the heart of Intel’s transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies—spanning software, processors, storage, I/O, and networking solutions—that fuel cloud, communications, enterprise, and government data centers around the world.

   

As an electronics industry innovator and a leader in corporate responsibility, we look for ways to apply our technology to address global challenges while serving as a role model for how companies should operate.

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