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Digital Design Engineer RTL2GDSII

Intel


Location:
Bangalore
Date:
04/06/2018
2018-04-062018-05-05
Job Code:
JR0054568
Categories:
  • Engineering
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Job Details

Digital Design Engineer RTL2GDSII Careers at Intel in Bangalore, KA
   
Job ID: JR0054568
Job Category: Engineering
Primary Location: Bangalore, KA IN
Other Locations:
Job Type: Experienced Hire

Digital Design Engineer RTL2GDSII

Job Description
In a fast paced leading edge environment with endless possibilities of innovating and learning, you will be responsible for designing of complex digital blocks and sub-chip of large designs like GFX, Imaging processors, Peripheral subsystems like PCIe, TypeC, Display, Media etc or other high speed designs like Memory subsystems/DDR Gen5/6, High Speed Serial IOs etc.Key responsibilities include but not limited to- RTL2GDSII implementation of complex subsystems/phys in advanced process nodes 10nm and below- Define the right recipes that produce the best PPA for the designs on the new architectures and technology nodes.- Working closely with the Frontend and Custom teams to enable fast design convergence and best PPA


Qualifications

Mtech/Btech in the fields of computer engineering/science with more than 3+ years of experience in the areas of RTL2GDSII Floorplanning, Physical design, APR and signoff flows designing chip level or block level layouts in advanced process nodes. Experience in ASIC Physical Design RTL to GDSII Implementation flow in areas of Logic synthesis, floor planning, power planning, placement, CTS, routing, timing sign-off, fill, layout verification etc. Experience with Low power design closure UPF based implementation and associated sign-off SG-LP/VCLP/Conformal methods is added plus. Knowledge of Timing .lib generation, Physical View Generation LEF, GDS, CEL, FRAM, NDM etc.. Experience in Reliability Verification EM/IR drop etc. is added plus. EDA tool knowledge: Design Compiler, ICC/ICC2 is preferred. Team player, with good problem solving and communication skills. Automation skills in PERL and/or TCL and/or Shell* is an added plus.

Inside this Business Group

The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.


Legal Disclaimer:

Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.

It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel’s offices for various positions and further requiring them to deposit money to be eligible for the interviews.   We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at and not fall prey to unscrupulous elements.


   

As an electronics industry innovator and a leader in corporate responsibility, we look for ways to apply our technology to address global challenges while serving as a role model for how companies should operate.

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