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Design Reliability CAD Technical Program Lead

Intel


Location:
Hillsboro, OR
Date:
01/17/2018
2018-01-172018-02-15
Job Code:
JR0046485
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Job Details

Design Reliability CAD Technical Program Lead Careers at Intel in Hillsboro, OR
   
Job ID: JR0046485
Job Category: Engineering
Primary Location: Hillsboro, OR US
Other Locations: California, Santa Clara;
Job Type: Experienced Hire

Design Reliability CAD Technical Program Lead

Job Description

If you are ready to take the next step in your career, Intel is the place for you.

At Intel you will have the opportunity to work with top HR talent that will increase your opportunities to develop your career and discover more of what you can do.

A Design Reliability CAD Technical Program Lead is responsible for defining and executing Intel-wide technical programs to enable automation solutions in circuit reliability simulation and design reliability verification capabilities for IP and SOC design teams. Expected deliverables are enabling POC/prototype developments, defining requirement definition for CAD/automation, and evaluating/assessing industry capabilities to address design quality and reliability solution. This leader will be partnering with key internal design TFM development and external CAD development teams. Also this leader will be engaged in identifying strategic technical gaps and benchmarking of requirements for CAD solutions for design reliability.

The ideal candidate should exhibit the following behavioral traits:

·         Proven project management/ leadership skills in driving development and problem solving.

·         Ability to work on multiple projects simultaneously to achieve all organizational goals within a highly matrix and dynamic environment. 

·         Excellent communication and networking skills to support the significant influencing and stakeholder management with diverse stakeholders


Qualifications

You must possess the below minimum qualifications to be initially considered for this position.  Qualifications listed as preferred or additional will be considered a plus factor for applicants. 

Minimum Requirements:

MS/PhD Computer Science or EE with 5+ years of hands-on CAD/automation flow development experience.

Knowledge in key CAD tools/methodology circuit simulation, performance verification, power estimation, and noise simulations for custom and SOC design flows.

Preferred Qualifications

Device physics/circuit reliability and device/interconnect models as well as skills in statistical data analysis.

Inside this Business Group

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth



Other Locations

California, Santa Clara;


Posting Statement. Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.

   

As an electronics industry innovator and a leader in corporate responsibility, we look for ways to apply our technology to address global challenges while serving as a role model for how companies should operate.

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