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CPU Verification Engineer

Intel


Location:
Santa Clara, CA
Date:
01/17/2018
2018-01-172018-02-15
Job Code:
JR0040693
Categories:
  • Engineering
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Job Details

CPU Verification Engineer Careers at Intel in Santa Clara, CA
   
Job ID: JR0040693
Job Category: Engineering
Primary Location: Santa Clara, CA US
Other Locations: Oregon, Hillsboro;
Job Type: Experienced Hire

CPU Verification Engineer

Job Description

The CPU Verification Engineer is a member of the Next Gen CPU Pre-Silicon Verification team and is responsible for exhaustively validating the RTL implementation of new architecture and micro-architecture capabilities using a combination of standalone and top level test environments.

Responsibilities may include, but are not limited to, the following:

  • Technical ownership of validation of a microarchitecture block, methodology, or otherwise significant aspect of CPU validation
  • Investigating new techniques to accelerate validation of CPU hardware, firmware, and software domains
  • Executing functional, performance, and power validation using dynamic, formal, and analytical approaches
  • Developing validation content like tools, test generators to match the complexity of new core and be reused in pre-si and post-si
  • Read and interpret technical specs and create high quality technical documentation like test plans, strategy documents
  • Collaborating and communicating with architecture, design, pre-si and post-si validation, and other teams to achieve project goals
  • Contributing to post-silicon debug preparation and sighting resolution


Qualifications

Required Skills/Experience:

  • Degree in Computer Science, Computer Engineering, or Electrical Engineering, or other related field of study with prior relevant work experience
  • Prior experience (3+ years with a Bachelor Degree OR 2+ with a Masters Degree) in the following areas:
    • Computer architecture knowledge, including specific areas of technical ownership/expertise relevant to CPUs
    • Experience with a hardware modeling language, such as Verilog, VHDL, or System Verilog and industry standard logic simulation tools
    • Validation environment development in Verilog, Specman, System Verilog UVM/OVM
    • Validation and debug experience including test writing/generation, checker development, coverage analysis, failure debug, root cause analysis
    • Assembly language programming, code generation, or other low-level software experience.
    • Programming experience in at least one language: C/C++, Perl, Python, Ruby, Java, TCL, etc.
    • Previous industry experience in micro-architecture, design or verification of CPU cores

Preferred Skills/Experience

  • Knowledge of Intel Architecture ISA and system architecture, x86 assembly language
  • Research publications, patent filings, or other evidence of personal technical innovation in validation methodology advancement.
  • Familiarity with software validation, including microcode, firmware, etc.
  • Experience in post-silicon debug and analysis

Inside this Business Group

The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.



Other Locations

Oregon, Hillsboro;


Posting Statement. Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.

   

As an electronics industry innovator and a leader in corporate responsibility, we look for ways to apply our technology to address global challenges while serving as a role model for how companies should operate.

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