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Core Datapath & Memory Design Lead

Intel


Location:
Bangalore
Date:
09/25/2017
2017-09-252017-10-24
Job Code:
JR0036288
Categories:
  • Engineering
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Job Details

Core Datapath & Memory Design Lead Careers at Intel in Bangalore, KA
   
Job ID: JR0036288
Job Category: Engineering
Primary Location: Bangalore, KA IN
Other Locations:
Job Type: Experienced Hire

Core Datapath & Memory Design Lead

Job Description

Candidate must possess a Masters Degree in Electrical or Computer Engineering with at least 9 or more years of experience in related field or a Bachelors Degree with at least 11 years of experience.

Preferred Experience: - Digital Design Experience, with experience in Custom digital and/or Register File design, and Section/Full-Chip level convergence, Timing Analysis, Floor planning - Familiarity with Verilog/VHDL - Strong verbal and written communication skills - Hands on Logic Design experience is a plus.


Qualifications

Inside this Business Group

The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.

   

As an electronics industry innovator and a leader in corporate responsibility, we look for ways to apply our technology to address global challenges while serving as a role model for how companies should operate.

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