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Circuit u-Architect

Intel


Location:
Bangalore
Date:
08/21/2017
2017-08-212017-09-19
Job Code:
JR0012189
Categories:
  • Engineering
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Job Details

Circuit uCareers at Intel inArchitect
   
Job ID: JR0012189
Job Category: Engineering
Primary Location: Bangalore, KA IN
Other Locations:
Job Type: Experienced Hire

Circuit u-Architect

Job Description
High Speed Design Engineers are responsible for the design and development of the high performance interfaces for electronic components for MIPI IP like D-Phy and C-Phy. Responsibilities may include the design of chip layout, circuit design, circuit checking, device evaluation and characterization, documentation of specifications, prototype construction and checkout, modification and evaluation of semiconductor devices and components, performing developmental and/or test work, reviewing product requirements and logic diagrams, planning and organizing design projects or phases of design projects. Responds to customer/client requests or events as they occur. Develops solutions to problems utilizing formal education and judgment. The candidate is expected to be self-sufficient and to be able to lead a small team. The candidate will be responsible for research and design of high speed low power Receiver and transmitters. In this position, you will be developing solutions to problems utilizing formal education and judgment. We are looking for designers who are seeking new opportunities in the MIPI field. Someone who is passionate about working in a small, dynamic environment where the expectation is we contribute in any activity that makes the business successful.


Qualifications

You must possess a Bachelor's or a Master's degree or PhD in Electrical Engineering, or a related discipline. You must have at least 12 years of circuit design experience.Knowledge of circuits required include 1. Analog Designer with solid MIPI protocol knowledge and hands on experience in PHY logic u-arch and definition 2. MIPI DPHY and CPHY analog building blocks or 3. Working experience in analog building blocks in High Speed low power serial interfaces like PCI express, SERDES or MIPI or 4. Any serial interface high speed receiver, high speed transmitter, etc. 5. Demonstrated leadership in time management and problem solving skills 6. Leadership in driving standards within company and industry 7. Experience designing systems 8. Experience in leading small teams and task managementResponsibilities will include Schematic capture, circuit simulation, circuit layout review, LIB file reviews, low power optimization, low power validation and signal integrity validation. Working independently and knowing general analog design BKM's is a must.

Inside this Business Group

The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.

   

As an electronics industry innovator and a leader in corporate responsibility, we look for ways to apply our technology to address global challenges while serving as a role model for how companies should operate.

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