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Big Core Layout Lead


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Job Details

Big Core Layout Lead Careers at Intel in Bangalore, KA
Job ID: JR0055786
Job Category: Engineering
Primary Location: Bangalore, KA IN
Other Locations:
Job Type: Experienced Hire

Big Core Layout Lead

Job Description
You will be part of Intel Architecture Cores Group IACG Group within Platform Engineering Group, in the Big Core IP development team driving Intel's latest CPU's in the World's leading process technologies.Responsibilities will include but not limited to: Layout design of Datapath and Register Files using semi-automated tools, flows, methodology along with manual polygon editsBlock level/sub-chip level floor-plan, Layout integration, power grid planning, clock routingAbstract view generation and full-chip assemblyRC extraction, RC aware routing both manual and semi-autoCoordination with circuit designerReliability Verification EM/SH/IR, etcPhysical verification DFM, DRC, LVS, Density, AntennaDevelop layout design methodologies


Candidate must possess a Master's Degree in VLSI or Electricals or equivalent with at least 10 years of experience in related field or a Bachelor's Degree in E&C or Electrical Engineering or equivalent with at least 12 or more years of experience or Diploma in E&C with at least 14 years of experience.Preferred Experience: -Layout design of high speed Datapath or Register file or custom memory-Understanding of Layout design Convergence at Block/Section Level -Basic understanding of timing analysis is plus-Scripting knowledge is plus.5-6 years of people manager experience.

Inside this Business Group

The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.

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