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ASIC/SOC DFx Design Engineer

Intel


Location:
San Jose, CA
Date:
01/17/2018
2018-01-172018-02-15
Job Code:
JR0049932
Categories:
  • Engineering
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Job Details

ASIC/SOC DFx Design Engineer Careers at Intel in San Jose, CA
   
Job ID: JR0049932
Job Category: Engineering
Primary Location: San Jose, CA US
Other Locations:
Job Type: Experienced Hire

ASIC/SOC DFx Design Engineer

Job Description

As a design engineer focusing on Design for Test/Debug/Manufacturability/Reliability DFx, you will be part of Intel's Programmable Solution Group PSG, working on complex ASIC and FPGA designs in leading edge process nodes.

Your focus will be on architecting, implementing and verifying DFx features of our ASIC and FPGA products. The design styles span ASIC, Semi-Custom, and Custom.Responsibilities include:

  • Define DFX architecture and implementation strategies. Author detailed DFx architectural and functional specifications
  • Perform pre-silicon ATPG, LBIST, MBIST, and assist to bring post-silicon ATPG, LBIST, MBIST to production.
  • Close collaboration with design team to implement DFx requirements, define scan insertion, test mode STA, and debug strategies for TTM.
  • Close collaboration with Functional Safety architect to define DFx strategies to meet coverage requirements for functional safety.
  • Partner with Product Engineering and Q&R teams to deliver DFx solutions to meet test cost, test time, yield and quality.


Qualifications

  • MS in Electrical Engineering, or equivalent, with a minimum of 5 years of experience in DFx design and verification.
  • Experience defining DFX architecture and methodology for complex silicon design projects.Ability to turn high level test requirements into efficient design implementations
  • Experience with entire DFX flow, from architecture definition all the way to production.
  • Possess extensive knowledge in DFT and ATE, design flows and industry tools.
  • Knowledge of structured design flows including Verilog, synthesis and test insertion, timing constraints and STA
  • Experience with JTAG and IEEE1500, Boundary scan, BIST, MBIST, high speed I/O testing, and analog circuit testing.
  • Attention to detail, and excellent verbal and written communication skillsProven ability to work in a cross functional team environment with demonstrated results

Inside this Business Group

The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.


Posting Statement. Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.
   

As an electronics industry innovator and a leader in corporate responsibility, we look for ways to apply our technology to address global challenges while serving as a role model for how companies should operate.

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