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3D XPoint Analog Mixed Signal Design Engineer

Intel


Location:
Folsom, CA
Date:
09/18/2017
2017-09-182017-10-17
Job Code:
JR0034147
Categories:
  • Engineering
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Job Details

3D XPoint Analog Mixed Signal Design Engineer Careers at Intel in Folsom, CA
   
Job ID: JR0034147
Job Category: Engineering
Primary Location: Folsom, CA US
Other Locations:
Job Type: College Grad

3D XPoint Analog Mixed Signal Design Engineer

Job Description

An analog designer on the 3DXP design team will be responsible for pathfinding new solutions to reduce energy, power, latency, die size of 3DXP products and to develop solutions for new technology requirements. Once all paths have been identified, designers build and test schematics that meet all functionality and performance goals for the designated 3DXP products and develop methodologies and coverage metrics to ensure quality at the fullchip level. After design is complete, designers support fullchip validation by building various path and fullchip models and running extensive full chip validation suites while also working with layout to ensure cell level and block level layout is being drawn as necessary to achieve the desired performance and spec functionality. Finally, the designers work with product engineering to debug post silicon issues by developing models for observed behavior and proposing experiments both in silicon and in simulation to prove or disprove the proposed models.


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through relevant previous job. This is an entry level position and will be compensated accordingly.

Minimum qualifications:
-    PhD degree in Electrical Engineering, Computer Engineering or a related discipline
-    6 (+) months of experience in CMOS semiconductor device physics and silicon processing
-    6 (+) months of experience with transistor-level circuit simulation tools such as SPICEA

Preferred Qualifications:
-    Experience using custom design environments such as Cadence Virtuoso
-    Knowledge of DRC, LVS, and post-layout extraction tools
-    Proficiency in UNIX and strong programming skills using C++, Perl, TCL, etc.
-    Experience in CMOS semiconductor device physics and silicon processing
-    Experience with transistor-level circuit simulation tools such as SPICEA
-    Project work using device modeling tools such as hsim, Ultrasim, etc

Inside this Business Group

Non-Volatile Solutions Memory Group:  The Non-Volatile Memory Solutions Group is a worldwide organization that delivers NAND flash memory products for use in Solid State Drives (SSDs), portable memory storage devices, digital camera memory cards, and other devices.  The group is responsible for NVM technology design and development, complete Solid State Drive (SSD) system hardware and firmware development, as well as wafer and SSD manufacturing.


Posting Statement. Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.
   

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